While the packaging of nanoelectronic devices has been slowed by uncertainty of which device technology will turn out to be commercially viable, nanotechnologies are being developed to address current packaging problems of microelectronic systems, with details showing up in many conference presentations, e.g., at the annual IEEE Electronic Component and Technology Conference. However, many experts in nanotechnologies are unaware of the possible applications in electronics packaging, and conversely many packaging engineers are unfamiliar with the potential of nanoscale materials and devices. This book is intended to bridge that gap, with Chap. 1 introducing the scope of the field with a literature survey. Then three chapters deal with computer modeling in nanopackaging. Bailey et al. take a high-level approach to the modeling process in Chap. 2, backed up with multiple examples of nanoscale modeling in packaging, present and future, including nanoimprinting, solder paste printing, microwave heating, underfill, and anisotropic conductive film. Chapter 3 from Fan and Yuen and Chap. 4 from van der Sluis et al. both focus on the molecular modeling technique, especially for interfacial characterization, with applications to carbon nanotube (CNT) thermal performance, moisture diffusion and thermal cycling, and delamination failures. The intention in each case is to understand macroscale package properties by modeling at nanoscale dimensions, and emphasize the need to be able to transfer modeling results between software at different length scales.